The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including an output circuit that converts an output signal level of an internal circuit to a level according to an externally connected device.
In recent years, semiconductor devices are increasingly highly integrated, and operate at higher speed. To reduce power consumption, efforts have also been made to lower the driving voltage of semiconductor devices. However, some semiconductor devices, whose driving voltage is yet to be lowered, still operate at high driving voltages. A semiconductor device may be connected to a plurality of other semiconductor devices that have different power supply voltages. Such a semiconductor device includes input and output (I/O) circuits for generating operating voltages corresponding to the power supply voltages of the other semiconductor devices.
The I/O circuits are conventionally arranged on the periphery of the semiconductor device. The other semiconductor devices and such elements as resistors are connected to the I/O circuits. To distinguish between semiconductor devices, the semiconductor device on which attention is focused is herein referred to as a “main semiconductor device”, and a semiconductor device connected to the main semiconductor device is herein referred to as a “sub-semiconductor device”.
The operating voltage of an I/O circuit of a sub-semiconductor device differs depending on its type (e.g., its memory). The main semiconductor device includes a plurality of I/O circuit blocks corresponding to operating voltages of one or more sub-semiconductor devices. Each I/O circuit block provides the corresponding operating voltage via a terminal (pad).
For example, as shown in FIG. 1, I/O blocks 12a, 12b, 12c, and 12d are arranged on the periphery of a main semiconductor device 11, and an internal circuit 13 is arranged inside the blocks 12a, 12b, 12c, and 12d. Each of the blocks 12a, 12b, 12c, and 12d includes a plurality of I/O circuits. Each block may include input circuits or output circuits instead of I/O circuits.
The blocks 12a to 12d are connected to a corresponding sub-semiconductor device. Each of the blocks 12a to 12d receives a power supply voltage according to the power supply voltage of the corresponding sub-semiconductor device, and generates a signal having a level corresponding to the received power supply voltage.
For example, each of the first and third blocks 12a and 12c is connected to a sub-semiconductor device that includes an I/O circuit, which operates at a first power supply voltage VDD1 (e.g., 1.8 V). Each of the blocks 12a and 12c is supplied with the first power supply voltage VDD1. Also, each of the second and fourth blocks 12b and 12d is connected to a sub-semiconductor device that includes an I/O circuit, which operates at a second power supply voltage VDD2 (e.g., 3.3 V). Each of the blocks 12b and 12d is supplied with the second power supply voltage VDD2.
The internal circuit 13 operates at a predetermined internal power supply voltage VDDI (e.g., 1.2 V), and inputs and outputs a signal having a level corresponding to the internal power supply voltage VDDI. Thus, each I/O circuit included in the first and third blocks 12a and 12c includes a level conversion circuit for converting voltages between the first power supply voltage VDD1 and the internal power supply voltage VDDI. Each I/O circuit included in the second and fourth blocks 12b and 12d includes a level conversion circuit for converting voltages between the second power supply voltage VDD2 and the internal power supply voltage VDDI.
Each of the first and third blocks 12a and 12c converts the voltage of a signal from the internal circuit 13 of the main semiconductor device into the first power supply voltage VDD1, and provides the corresponding sub-semiconductor device with a signal having the first power supply voltage VDD1. Each of the second and fourth blocks 12b and 12d converts the voltage of a signal from the internal circuit 13 into the second power supply voltage VDD2, and provides the corresponding sub-semiconductor device with a signal having the second power supply voltage VDD2.
Pads of each of the blocks 12a to 12d are connected to power supply wiring to which the first power supply voltage VDD1 or the second power supply voltage VDD2 is provided. With this structure, the operating voltage of each of the blocks 12a to 12d is changed in correspondence with the operating voltage of the connected sub-semiconductor device, by changing the power supply voltage provided to the power supply wiring of each of the blocks 12a to 12d. 